things that make you go hmmm
So this guy Derek Jones writes this enormous book analyzing the current C language standard from more angles than anyone really cares about, then Addison Wesley decides they don't want to publish it (can't blame them; it needs some serious editing and I suspect that won't be a fun process). So the guy makes the pdf available on the net while trying to find a new publisher.
So here's what made me go hmm:
At the lowest level processors are built from transistors. Which are grouped together to form logic gates. In CMOS circuits power is dissipated in a gate when its output changes (that is it goes from 0 to 1, or from 1 to 0). Vendors interested in low power consumption try to design to minimize the number of gate transitions made during the operation of a processor. Translators can also help here. Machine code instructions consist of sequences of zeros and ones. Processors read instructions in chunks of 8, 16, or 32 bits at a time. For a processor with 16-bit instructions that are read 16 bits at a time it is the difference in bit patterns between adjacent instructions that can cause gate transitions. The Hamming distance between two binary values (instructions) is the number of places at which their bit settings differ. Ordering instructions to minimize the total Hamming distance over the entire sequence will minimize power consumption in that area of a processor. Simulations based on such a reordering have shown savings of 13% to 20%.
Never thought of that. Also, not quite sure I believe it (the underlying principle, yes; the 13% power consumption savings, no).
So here's what made me go hmm:
At the lowest level processors are built from transistors. Which are grouped together to form logic gates. In CMOS circuits power is dissipated in a gate when its output changes (that is it goes from 0 to 1, or from 1 to 0). Vendors interested in low power consumption try to design to minimize the number of gate transitions made during the operation of a processor. Translators can also help here. Machine code instructions consist of sequences of zeros and ones. Processors read instructions in chunks of 8, 16, or 32 bits at a time. For a processor with 16-bit instructions that are read 16 bits at a time it is the difference in bit patterns between adjacent instructions that can cause gate transitions. The Hamming distance between two binary values (instructions) is the number of places at which their bit settings differ. Ordering instructions to minimize the total Hamming distance over the entire sequence will minimize power consumption in that area of a processor. Simulations based on such a reordering have shown savings of 13% to 20%.
Never thought of that. Also, not quite sure I believe it (the underlying principle, yes; the 13% power consumption savings, no).